1. Field of the Invention
This invention relates to ADCs and more specifically to a clock-to-clock auto-ranging ADC that operates directly on the IF band.
2. Description of the Related Art
Known ADCs are used to convert a baseband analog signal (0-500 KHz) into an equivalent digital signal by sampling the baseband signal at at least twice the signal frequency to satisfy the Nyquist criterion and then quantizing the sampled values with a fixed number of bits. The baseband signal may be oversampled 16 to 128 times to achieve a processing gain and to ease the tolerances on filters and amplifiers that are used in conjunction with the ADC.
Known communications systems modulate different high frequency sinusoidal carrier signals with respective baseband signals, broadcast them over the communications channel, and demodulate them at the receiver. This reduces the required size of the transmitter and receiver antennas and allows simultaneous transmission of multiple baseband signals. At the transmitter, the baseband signals are modulated up to the different IF bands, upconverted to the different RF channels, and transmitted over the channel. At the receiver, multiple mixdown stages are used in conjunction with narrow band filters to downconvert the RF signal to, for example, 71 MHz, 10.7 MHz and then to baseband and to select a particular baseband signal. The baseband signal is then input to the ADC, which produces the equivalent digital signal.
As a result of the transmission medium, the received signal level may vary over a relatively wide amplitude range. For example, the signal may vary by 30 dB within its 90 dB range during a data burst. If this signal were input directly to a fixed-range ADC, as the signal moved over the 90 dB range the ADC would at times saturate and clip the signal and at other times only coarsely resolve the signal. Thus, some known ADCs employ tracking circuitry that gains/attenuates the signal prior to digitizing such that the dynamic range of the signal approximately matches that of the fixed-range ADC. However, the tracking circuitry exhibits a time delay such that the signal may clip or be coarsely resolved for a period of time before the gain/attenuation can be adjusted. Furthermore, after the gain/attenuation is adjusted the signal must settle for some period of time. This will introduce distortion and a loss of signal sensitivity.
A well known approach is to pass the baseband signal through multiple gain paths in which each gain path has a different gain/attenuation buffer and its own fixed-range "flash" ADC. The DSP looks at the digital signal coming out of the highest gain channel. If the digital signal is saturated, the DSP steps down to the next highest gain channel and so forth until it identifies an unsaturated signal. This causes a time delay of several clock cycles before the proper gain/attenuation level is attained, during which the digital signal is saturated and information may be lost. Furthermore, the signals gain paths cannot be changed during the burst because the equalization would be severely compromised due to phase and gain differences between gain paths. As a result, the receiver is very hardware intensive.
Iwamatsu, U.S. Pat. No. 4,851,842, discloses an ADC that detects the level of the baseband input signal and uses the detected level to adjust the gain of its variable gain amplifier. As shown in FIG. 2 and described in col. 3, lines 22-27, when the detected level crosses one of the preset levels there is a delay of several cycles of the baseband input signal before the gain of the amplifier is adjusted and the signal has settled. Iwamatsu calls this delay the "insensitive region," in which the signal could saturate the ADC thereby clipping the signal or underrange the ADC thereby providing only coarse resolution.
As shown, the insensitive region includes approximately eight baseband cycles. Since the ADC's sampling rate must satisfy the Nyquist criterion, the insensitive region corresponds to a minimum of sixteen cycles of the digital output signal, and potentially many more if the ADC oversamples the baseband signal. Thus, every time the gain level is adjusted, there is a lag of at least sixteen clock cycles in the digital signal before the appropriate gain level is applied and the analog signal settles, during which the digital signal can either saturate or only coarsely resolve the baseband analog signal.
Another drawback of Iwamatsu is that the level detection circuit adjusts the resistance value of the feedback circuitry around the amplifier to set its gain. As a result, the bandwidth and phase of the resulting digital signal may be a function of the selected gain level. Thus, as before, equalization may be compromised.